1. Field of the Invention
The present invention relates to the design of analog to digital converters (ADC), and more specifically to a method and apparatus for reducing droop in a reference signal provided to an ADC.
2. Related Art
Analog to digital converter (ADC) generally refer to a component which converts an analog signal to a sequence of digital codes. In general, an ADC samples an input analog signal at specific time points, and generates corresponding digital codes. ADCs are thus generally used to provide a digital representation of the signal level of an input analog signal.
A reference signal (Vref) is often used by an ADC in providing such conversions. In general, Vref specifies the maximum input voltage that can be converted into a corresponding maximum digital code. In addition, assuming that each digital code contains N-bits, Vref is commonly divided into 2N equal step sizes, and a sampled analog signal strength is compared with the step sizes to determine the digital code corresponding to the sampled analog signal strength.
Droop generally refers to the change/deviation from the ideal characteristics of the reference signal Vref. Droop (in the reference signal) commonly causes an error in the digital codes generated by an ADC as Vref is used to generate the digital codes, as noted above. Such errors in digital codes are generally undesirable in at least some scenarios. Accordingly, it is desirable to reduce droop in Vref provided to ADCs.
In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.